VOCAL provides a range of Forward Error Correction algorithms optimized for different platforms to meet speed and memory requirements for your application. Our software may be licensed as a standalone algorithm or library with custom solutions available. Contact us to discuss your application requirements.
Turbo Codes
VOCAL’s Turbo Codes (TC) Forward Error Correcting (FEC) algorithms are available in several forms, including pure software and varying levels of hardware complexity utilizing UDI instructions. The Turbo Codes algorithms can be used on squared and non-squared QAM constellations and include both Full-Turbo coding and Multi-level Turbo Coding. The process of encoding is simpler than decoding; for this reason, this technique is very suitable for asymmetrical coding (where different coding is used in each direcction of the communication system).
Low-Density-Parity-Check Codes
VOCAL’s Low-Density-Parity-Check Codes (LDPC) Forward Error Correcting (FEC) algorithms are available in several forms, including pure software and varying levels of hardware complexity utilizing UDI instructions. Low-Density-Parity-Check Codes algorithms can be used on squared and non- squared QAM constellations and include both Full-Low-Density-Parity-Check Codes and Multi-level Low- Density-Parity-Check Codes. In this case, the process of decoding is simpler than encoding; therefore, this technique is also very suitable for asymmetrical coding.
BCH code
VOCAL’s BCH error correction algorithms are available in several forms. Pure software solutions are available in several different forms for both the encoder and decoder. Different versions allow speed versus memory tradeoffs to be made, permitting efficient and easy expansion of the code for assembly language optimization.
Reed Solomon (RS) coding
VOCAL Reed Solomon (RS) FEC algorithms are available in several formats, including pure software and varying levels of hardware complexity utilizing UDI instructions. The Reed Solomon algorithms rely on special properties of Galois Field (GF) operations. UDI instructions are recommended to support the efficient implementation of Galois Field operations. Where special assistive hardware is not available (as is the case on most general purpose processors), the algorithms are typically implemented via table look-ups or are performed in the log domain. Optimization for specific architectures is available for varying levels of cache usage and processing power. Pure software solutions are available in several different forms for both the encoder and decoder. Different versions allow speed versus memory tradeoffs to be made, permitting efficient and easy expansion of the code for assembly language optimization.